1. Field of the Invention
One embodiment of the present invention relates to a semiconductor device. For example, one embodiment of the present invention relates to a programmable logic device in which the configuration of hardware can be changed, and a semiconductor device including the programmable logic device.
2. Description of the Related Art
A programmable logic device (PLD) has a structure in which adequate-scale logic circuits (logic blocks, or programmable logic elements) are electrically connected to each other by a routing resource, and the functions of the logic blocks and the connection between the logic blocks can be changed after manufacture. The functions of the logic blocks and the connection between the logic blocks formed using a routing resource are determined by configuration data, and the configuration data is stored in a register included in each logic block or a register included in the routing resource. A register for storing configuration data is hereinafter referred to as a configuration memory.
Non-Patent Document 1 discloses a field programmable gate array (FPGA) whose routing resource is formed using a circuit in which an SRAM cell is connected to a gate of a pass transistor through an isolator transistor.